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MAX9259, MAX9260
Gigabit Multimedia Serial Link with Spread Spectrum and Full-Duplex Control Channel

Single-Link Serializer/Deserializer Chipset with Integrated Control Channel Is Ideal for Digital Video Applications


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Status
Active: In Production.

Description
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The MAX9259/MAX9260 chipset presents Maxim's gigabit multimedia serial link (GMSL) technology. The MAX9259 serializer pairs with the MAX9260 deserializer to form a complete digital serial link for joint transmission of high-speed video, audio, and control data.

The MAX9259/MAX9260 allow a maximum serial payload data rate of 2.5Gbps for a 15m shielded twisted-pair (STP) cable. The 24-bit or 32-bit width parallel interface operates up to a maximum bus clock of 104MHz or 78MHz, respectively. This serial link supports display panels from QVGA (320 x 240) up to XGA (1280 x 768), or dual-view WVGA (2 x 854 x 480).

The 24-bit or 32-bit mode handles 21 or 29 bits of data, along with an I²S input, supporting 4- to 32-bit audio word lengths and an 8kHz to 192kHz sample rate. The embedded control channel forms a full-duplex, differential 100kbps to 1Mbps UART link between the serializer and deserializer. The host electronic control unit (ECU) or microcontroller (µC) resides either on the MAX9259 (for video display) or on the MAX9260 (for image sensing). In addition, the control channel enables ECU/µC control of peripherals in the remote side of the serial link through I²C (base mode) or a user-defined full-duplex UART format (bypass mode).

The MAX9259 serializer driver preemphasis and channel equalizer on the MAX9260 extend the link length and enhance the link reliability. Spread spectrum is available on the MAX9259/MAX9260 to reduce EMI on the serial and parallel output data signals. The differential link complies with the ISO 10605 and IEC 61000-4-2 ESD-protection standards.

The core supplies for the MAX9259/MAX9260 are 1.8V and 3.3V, respectively. Both devices use an I/O supply from 1.8V to 3.3V. The MAX9259/MAX9260 are available in a 64-pin TQFP package (10mm × 10mm) with an exposed pad. Electrical performance is guaranteed over the -40°C to +105°C automotive temperature range.

Key Features   Applications/Uses
  • 2.5Gbps Payload Rate, AC-Coupled Serial Link with 8B/10B Line Coding
  • 24-Bit or 32-Bit Programmable Parallel Input Bus Supports Up to XGA (1280 x 768) or Dual-View WVGA (2 x 854 x 480) Panels with 18-Bit or 24-Bit Color
  • 8.33MHz to 104MHz (24-Bit Bus) or 6.25MHz to 78MHz (32-Bit Bus) Parallel Data Rate
  • Support Two/Three 10-Bit Camera Links at 104MHz/78MHz Maximum Pixel Clock
  • 4-Bit to 32-Bit Word Length, 8kHz to 192kHz I²S Audio Channel Supports High-Definition Audio
  • Embedded Half-/Full-Duplex Bidirectional Control Channel (100kbps to 1Mbps)
  • Separate Interrupt Signal Supports Touch-Screen Functions for Display Panels
  • Remote-End I²C Master for Peripherals
  • Preemphasis Line Driver (MAX9259)/Line Equalizer (MAX9260)
  • Programmable Spread Spectrum on the Serial or Parallel Data Outputs Reduce EMI
  • Deserializer Does Not Require an External Clock
  • Auto Data-Rate Detection Allows "On-The-Fly" Data-Rate Change
  • Input Clock PLL Jitter Attenuator (MAX9259)
  • Built-In PRBS Generator/Checker for BER Testing
  • Line-Fault Detector Detects Wire Shorts to Ground, Battery, or Open Link
  • ISO 10605 and IEC 61000-4-2 ESD Protection
  • -40°C to +105°C Operating Temperature Range

 
  • Automotive Navigation, Infotainment, and Image-Sensing Systems
  • High-Speed Serial-Data Transmission for Display
  • High-Speed Serial-Data Transmission for Image Sensing

    Key Specifications:  High-Speed Interconnect (Differential Signaling)
    Part Number Features Signal Type Signal Type Functions Rx Tx Data Rates
    (Mbps)
    VSUPPLY
    (V)
    Rx Tx
    MAX9259 
    DC Balanced
    High-ESD Rating
    Pin-Programmable Configuration
    Programmable Spread Spectrum
    Standalone Serializer
    LVCMOS LVDS Serializer 18 1 840 3.3
    See All High-Speed Interconnect (Differential Signaling) (132)

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    Document Ref.: 19-4968; Rev 0; 2009-11-04
    This page last modified: 2009-11-05


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